Instruction buffer associated with a cache memory unit

Details Instruction buffer associated with a cache memory unit Instruction buffer associated with a cache memory unit

1982-10-04

1985-06-04

Zache, Raulfe B.

Boots, shoes, and leggings

G06I 930

Patent

active

045218501

ABSTRACT:
Apparatus and method for providing an improved instruction buffer associated with a cache memory unit. The instruction buffer is utilized to transmit to the control unit of the central processing unit a requested sequence of data groups. In the current invention, the instruction buffer can store two sequences of data groups. The instruction buffer can store the data group sequence for the procedure currently in execution by the data processing unit and can simultaneously store data groups to which transfer, either conditional or unconditional, has been identified in the sequence currently being executed. In addition, the instruction buffer provides signals for use by the central processing unit defining the status of the instruction buffer.

REFERENCES:
patent: 3401376 (1968-09-01), Barnes
patent: 3551895 (1968-01-01), Driscoll
patent: 3764988 (1973-10-01), Onishi

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