Method for making a polysilicon transistor

Details Method for making a polysilicon transistor Method for making a polysilicon transistor

1988-10-17

1990-05-01

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 49, 437 56, 437915, 437192, 437193, 437 57, H01L 2978, H01L 2182

Patent

active

049218131

ABSTRACT:
An N channel transistor is formed in an active region of a substrate and a P channel transistor is formed in a second layer of polysilicon with a first layer of polysilicon forming the gate for both transistors. An interlayer oxide between the first and second polysilicon layers is used as a gate insulator for the P channel transistor. The first and second layers of polysilicon are formed before the source and drain of the N channel transistor are formed in the active region. The first and second layers of polysilicon are selectively etched to form a self-aligned strip of first and second polysilicon. The self-aligned strip is over a portion of the active region to expose portions of the active region on both sides of the self-aligned strip. The exposed portions of the active region are doped to form the source and drain of the N channel transistor with a channel therebetween. The second polysilicon portion of the self-aligned strip is selectively doped to form a source and a drain with a channel therebetween. Because the interlayer oxide is formed before the source and drain of the N channel transistor, the interlayer oxide can be formed for optimum integrity without adversely affecting the source and drain of the N channel transistor.

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Tang et al., "VLSI Local Interconnect Level Using Titanium Nitride" IEDM 85, pp. 590-593.

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