Fishing – trapping – and vermin destroying
Patent
1991-08-30
1993-08-24
Fourson, George
Fishing, trapping, and vermin destroying
437186, 437946, 437233, 148DIG17, 148DIG118, 148DIG124, H01L 21329
Patent
active
052388492
ABSTRACT:
A bipolar transistor having a silicon oxide film having a stoichiometric composition ratio of silicon to oxygen controlled to 1 to 2 formed at the boundary between a monocrystalline layer and a polycrystalline layer. In fabrication, a natural oxidized film formed on the surface of an intrinsic base region of a single-crystal is removed in an ultrahigh-vacuum chamber. Subsequently, oxygen ions are supplied to the surface of the base region at room temperature to form a silicon oxide film. Further, silicon molecular beams are supplied in the same chamber to form the polycrystalline silicon layer. The current gain factor h.sub.FE of the bipolar transistor thus formed can be greatly improved.
REFERENCES:
patent: 4118250 (1978-10-01), Horng et al.
patent: 4543592 (1985-09-01), Itsumi et al.
patent: 4585668 (1986-04-01), Asnussen et al.
patent: 4804640 (1989-02-01), Kaganowicz et al.
patent: 5039625 (1991-08-01), Reesuan et al.
patent: 5089441 (1992-02-01), Moslehi
Machida, K., "SiO.sub.2 Planarization . . . Interconnections", J. Vac. Sci & Technol. B vol. 4 Jul./Aug. 1986 pp. 818-820.
Ghandhi, S., VSLI Fabrication Principles: Silicon and Gallium Arsenide, 1983 pp. 517-518.
Fourson George
NEC Corporation
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