Bidirectional FIFO buffer having reread and rewrite means

Details Bidirectional FIFO buffer having reread and rewrite means Bidirectional FIFO buffer having reread and rewrite means

1989-02-28

1992-01-07

Hecker, Stuart N.

Boots, shoes, and leggings

3642386, 364239, 3642391, 3642396, 3642398, 3649261, 364939, 3649394, 3649397, G06F 506

Patent

active

050796933

ABSTRACT:
A FIFO buffer in accordance with the present invention employs a 1K by eighteen FIFO (A.fwdarw.B) buffer portion to store eighteen-bit words; an eighteen-bit-to-nine-bit multiplexer portion to convert (fold) stored eighteen-bit words into two, nine-bit words; a nine-bit-to-sixteen-bit multiplexer portion to convert (assemble) pairs of nine-bit words into one, eighteen-bit word; a 1K by eighteen FIFO (B.fwdarw.A) buffer portion to store (eighteen-bit) words; eighteen, tri-state, buffers to permit direct communication; a parity generator portion; a parity checking portion; the combination of an A-port access control portion and a programmable flag logic portion to permit connection to a sixteen-bit or a thirty-two-bit microprocessor; and the combination of a B-port access control portion and a hand shake interface control portion to permit connection to an eight-bit microprocessor, a non-direct memory access DMA type peripheral device, or a DMA-type peripheral device.

REFERENCES:
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patent: 4144562 (1979-03-01), Cooper
patent: 4213177 (1980-07-01), Schmidt
patent: 4467447 (1984-08-01), Takahashi et al.
patent: 4571671 (1986-02-01), Burns et al.
patent: 4626985 (1986-12-01), Briggs
patent: 4868784 (1989-09-01), Marschall et al.
patent: 4882702 (1989-11-01), Struger et al.

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