Semiconductor integrated circuit device and process for fabricat

Details Semiconductor integrated circuit device and process for fabricat Semiconductor integrated circuit device and process for fabricat

1990-10-18

1992-01-07

Wojciechowicz, Edward J.

357 234, 357 236, 357 238, 357 2312, 357 51, 357 59, H01L 2702

Patent

active

050796119

ABSTRACT:
Herein disclosed is a semiconductor integrated circuit device having a SRAM, in which two MISFETs of a flip-flop circuit of a memory cell are connected directly with an n.sup.+ -type drain region so that they are cross coupled; and in which a p.sup.+ -type semiconductor region is formed below a direct contact part by making use of the mask used in the step of forming contact holes for the direct contact part. The p.sup.+ -type semiconductor region aids as a barrier to prevent soft errors of the SRAM due to .alpha.-particles.

REFERENCES:
patent: 4833647 (1989-05-01), Maeda et al.

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