Silicon-on-insulator transistor with selectable body node to sou

Details Silicon-on-insulator transistor with selectable body node to sou Silicon-on-insulator transistor with selectable body node to sou

1989-11-27

1992-01-07

Hille, Rolf

357 4, 357 86, 357 67, 357 239, H01L 2712, H01L 2348, H01L 2701, H01L 2906

Patent

active

050796054

ABSTRACT:
A silicon-on-insulator MOS transistor (100) is disclosed which has contact regions on both the source (6) and drain (8) sides of the gate electrode (10) for (36,38) potentially making contact to the body node (12) from either side. Each contact region (36,38) is of the same conductivity type as the body node (12), (for example, a p-type region for an n-channel transistor), and may be formed by blocking all source/drain implants from the contact regions (36,38), so that the contact region (36,38) remains substantially with the same doping concentration as the of the body region (12). A mask is provided prior to silicidation so that the contact regions (36,38) on either side of the gate electrode (12) are not connected by silicide to the adjacent source/drain doped regions (6,8). Once a side is selected to be the source of the transistor, ohmic connection is then made between the abutting source region (6) and the contact region (36) by way of contacts (22,23) through an overlying interlevel dielectric (40) and metallization (25). A second embodiment of the transistor (200) is disclosed which provides such contact with reduction in the channel width, by allowing the lightly-doped drain extension of the source (19) and drain (18) to be present between the contact region (36,37,38) on both sides of its gate so that all of the contact regions on the mesa are connected through the body nodes of the transistors. A single body-to-source node connection can thus provide body node bais for all of the transistors on the mesa.

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Kumator et al., "An SOI Structure for Flash A/D Converter", IEEE J. Soc vol.-23, No. 1, Feb. 1988, pp. 198-201.
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Tihany et al., "Influence of the Floating Substrate Potential on the Characteristics of ESFI MOS Transistors", Solid State Electronics, vol. 18 (Pergamon, 1975), pp. 309-314.
Lee et al., "Island-Edge Effects in CMOS/SOS Transistors", IEEE Trans. E.D., vol. ED-25, No. 8 (Aug. 1978), pp. 971-978.

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