Multiprocessor system

Details Multiprocessor system Multiprocessor system

1986-06-26

1988-04-26

Heckler, Thomas M.

Boots, shoes, and leggings

G06F 900

Patent

active

047409100

ABSTRACT:
In this invention, when a service processor must request processing to all of n processors, it supplies a processing request to one of the n processors using a 1:1 inter-processor communication instruction. The processor receiving the request from the service processor then supplies a processing request to the remaining (n-1) processors using a 1:n inter-processor communication instruction. A bus control unit for controlling a system bus has a flag indicating whether or not the 1:1 (or 1:n) inter-processor communication instruction is sent. The service processor and other processors refer to the flag. When the flag is ON, issuance of the 1:1 (or 1:n) inter-processor communication instruction is inhibited to prevent contention between a plurality of requests.

REFERENCES:
patent: 4096566 (1978-06-01), Borie et al.
patent: 4145739 (1979-03-01), Dunning et al.
patent: 4219873 (1980-08-01), Kober et al.
patent: 4223380 (1980-09-01), Antonaccio et al.
patent: 4228496 (1980-10-01), Katzman et al.
patent: 4368514 (1983-01-01), Persaud et al.
patent: 4404628 (1983-09-01), Angelo

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