Noise rejecting TTL to CMOS input buffer

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307451, 307475, 307264, 307443, A03K 1912, A03K 19092

Patent

active

050794396

ABSTRACT:
A TTL to CMOS buffer circuit includes a relatively high-speed first inverter path and a second relatively low-speed inverter path connected to the first path and effective to control the operation of the first path inverter so that short-duration positive- or negative-going noise pulses of amplitude up to 2.4 volts do not incorrectly affect the output level.

REFERENCES:
patent: 4563594 (1986-01-01), Koyama
patent: 4763023 (1988-08-01), Spence
patent: 4786830 (1988-11-01), Foss
patent: 4812687 (1989-03-01), Larson et al.
patent: 4890010 (1989-12-01), Neudeck et al.
patent: 4933648 (1990-06-01), Frogge
patent: 4939394 (1990-07-01), Hashimoto

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