Pattern generator with extended register programming

Details Pattern generator with extended register programming Pattern generator with extended register programming

1997-02-18

1999-03-16

Beausoliel, Jr., Robert W.

Excavating

39518308, G01R 3128

Patent

active

058839054

ABSTRACT:
An algorithmic pattern generator (APG) having extended register programming capability for use in a circuit tester. The APG is programmable to drive a subroutine memory in a tester. The APG may include a sequencer with paired loop counters, address generators having address and reference registers each paired with indexing registers, a data generator providing bit inversion with a latched inversion register, a topology memory, or a delayed access pipeline for data synchronization. The APG may also include a two stage address scrambler combining a crosspoint multiplexer and scrambler RAM.

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Schlumberger S92 Programming Manual, 1991, P/N 57510101, Rev. 2.
MTS Operation & Programming TPC XXV, 1983, P/N 371667, Rev. B.

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