Semiconductor memory of XN type having parity corresponding to n

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G11C 2900

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058839038

ABSTRACT:
A storage unit has m segments each having a plurality of storage areas each storing data of n-bit. One of the plurality of storage areas in each segment is selected by a storage area selection signal. A buffer memory has an (n.times.m)-bit storage area for storing n-bit for each of the m segments of the storage unit. Data is adapted to be transferred between the storage area of each segment and a corresponding storage area of the buffer memory. A parity storage unit has a storage area for storing one parity per the (n.times.m)-bit data stored in the buffer memory. A data correction unit corrects data in accordance with a parity stored in the parity storage unit and the (n.times.m)-bit data read from the m storage areas each selected from each of the m segments of the storage unit.

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