Interconnection routing method for reducing crosstalk between in

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Other Related Categories

364489, G06F 1750

Type

Patent

Status

active

Patent number

058838120

Description

ABSTRACT:
An interconnection routing method for an intergrated circuit is applied to a channel area. The method includes the steps of calculating the length of each net in a given routing to thereby obtain a first set of nets having a long trunk. The nets in the first set are assigined to tracks in a central portion of the channel area to reduce crossings between the long trunk nets and other nets. The method further includes forming a second set for net pairs each running parallel in a long length with a small space therebetween. One of the net pairs in the second set is divided or doglegged to obtain a reduced coupled capacitance and crosstalk between the pairs. The present invention reduces crosstalk and coupled capacitance induced between parallel running interconnections or crossing interconnections.

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patent: 4852016 (1989-07-01), McGehee
patent: 4903214 (1990-02-01), Hiwatashi
patent: 4910680 (1990-03-01), Hiwatashi
patent: 5272645 (1993-12-01), Kawakami et al.
patent: 5295082 (1994-03-01), Chang et al.
"A Spacing Algorithm for Performance Enhancement and Cross-talk Reduction"; Kamal Chaudhary et al.; IEEE 1993; pp. 697-702.
"Minimum Crosstalk Channel Routing"; Tong Gao and C.L. Liu; University of Illinois; Department of Computer Science; 1993 IEEE; pp. 692-696.
"Wiring and Crosstalk Avoidance in Multi-Chip Module Design"; Howard H. Chen and C.K. Wong; IBM Research Division; Thomas J. Watson Research Center; 1992 IEEE Custom Integrated Circuits Conference; pp. 28.6.1-28.6.4 .

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