Universal serial bus driver having MOS transistor gate capacitor

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Patent

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Details

327391, 327437, 326 27, 326 83, H03K 19017, H03K 1704

Patent

active

058835318

ABSTRACT:
A driver which includes an output node and an output transistor connected between the output node and a first voltage reference node. A CMOS inverter is connected to a gate of the output transistor and includes a first p-channel transistor and a first n-channel transistor that have their gates connected together. A capacitance transistor is connected to the output node and the CMOS inverter and is configured to create a capacitance therebetween. A shifting transistor has its drain-source conducting path connected in series with a drain of the first p-channel transistor and a drain of the first n-channel transistor and is configured to maintain the capacitance transistor in accumulation mode. A method of driving a line includes the steps of creating a capacitance between the output node and the CMOS inverter with a capacitance transistor having its source and drain connected together, and maintaining the capacitance transistor in accumulation mode with a shifting transistor having its drain-source conducting path connected in series with a drain of the first p-channel transistor and a drain of the first n-channel transistor of the CMOS inverter.

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