Single chip pipeline data processor using instruction and operan

Details Single chip pipeline data processor using instruction and operan Single chip pipeline data processor using instruction and operan

1989-03-13

1991-01-29

Williams, Jr., Archie E.

Boots, shoes, and leggings

3642433, 3642434, 36424341, 36424342, 3642461, 3642563, 3642594, 3642624, G06F 9312, G06F 934, G06F 1210, G06F 1316

Patent

active

049891405

ABSTRACT:
A data processor for executing instructions using operand data stored in a main memory includes an instruction control unit having a first associative memory storing instruction read out from the main memory, and an instruction controller reading out an instruction from the first associative memory when the instruction is present in the first associative memory and from the main memory when the instruction is not present in the first associative memory the instruction control unit produces an output the instruction to be executed. An instruction execution unit has a second associative memory that stores operand data read out from the main memory, and an instruction executioner executing the instruction by using operand data read out from the second associative memory when the operand data is present in the second associative memory and from the main memory when the operand data is not present in the second associative memory.

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