Dynamic random access memory cell

Details Dynamic random access memory cell Dynamic random access memory cell

1989-06-15

1991-01-29

Jackson, Jr., Jerome

357 2314, 357 2315, 357 47, H01L 2978, H01L 2702

Patent

active

049890557

ABSTRACT:
The described embodiments of the present invention provide a dynamic random access memory cell and array. The memory cell provides a three transistor storage device where the storage signal is stored on the gate of a storage transistor. All three transistors are integrated into a trench thereby providing the density equal to that of the densest of modern day DRAM cells. By using the three transistor concept, the first embodiment of the present invention provides a gain for the stored charge. Because the storage transistor amplifies the stored charge, the reduced capacitance of ultra-dense DRAM cells is overcome and adequate data sensing may be accomplished using capacitances much smaller than those useful in the single transistor, single capacitor DRAM cell.

REFERENCES:
patent: 4673962 (1987-06-01), Chatterjee et al.
patent: 4769786 (1988-09-01), Garnacle et al.
IBM Tech. Disclosure, vol. 31, #7, Dec. 88 (p. 307).

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