Secondary cache control for a computer system

Details Secondary cache control for a computer system Secondary cache control for a computer system

1990-03-21

1993-05-18

Richardson, Robert L.

395550, G06F 1300

Patent

active

052127818

ABSTRACT:
A secondary cache control system for a computer system is disclosed. The system is utilized advantageously to reduce the cost of the SRAM while not degrading the overall performance of the CPU associated with the computer. The system latches the data from the CPU until the CPU hits a "dead time". When this dead time occurs, the data is written into the SRAM. By writing to the SRAM at this time the performance of the computer system is not degraded and the cost of the SRAM is significantly reduced.

REFERENCES:
patent: 5058006 (1991-10-01), Durdan et al.

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