Virtual vector registers for vector processing system

Details Virtual vector registers for vector processing system Virtual vector registers for vector processing system

1984-06-22

1988-09-13

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 1300

Patent

active

047713801

ABSTRACT:
A data processing system has a working or buffer store connected between a main or bulk store and a vector processing unit. The buffer store contains one or more vitual vector registers operable under user control in register-to-register vector operations. A user instruction specifies the length of a vector operand to be processed, the type of operation to be performed, and which vector registers will be used. Vector processing is controlled by a series of programs defined at the code level of the processing unit where for a given function or operation, the same program is used for both register-to-register and storage-to-storage processing. The latter processing is controlled by passing predetermined parameters to the program whereas register-to-register processing is controlled by passing parameters generated in response to user program instructions.

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IBM Field Engineering Theory of Operation Manual, 2938 Array Processor, Model 1, RPQW24563, Model 2, RPQ815188, 1969.
GA24-3639-1, IBM 3838 Array Processor Functional Characteristics, 1976, '77, '78, '81.

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