Memory conflict buffer for achieving memory disambiguation in co

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395445, 395455, 395471, 395472, 395481, 364DIG1, G06F 1300, G06F 1200

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056945779

ABSTRACT:
An apparatus is provided, for use in a computer having a register bank and a device for operand fetch and instruction execution, for monitoring a store address to maintain coherency of preloaded data that is fetched by a load operation and should be effected by at least one subsequent store operation. The apparatus includes an address register bank having entries for holding the address of a load having loaded data which should be affected by at least one subsequent store operation. Each of the entries has associated therewith a pre-load flag and a type field, the pre-load flag being set when the load is executed and reset when there is no need to be affected by a subsequent store operation. The apparatus is further configured to compare the address held in the register bank with the address of a subsequent store operation in consideration of the access type held in the type of field when the pre-load flag is set, and to reset the pre-load flag when special operation which terminate monitoring addresses are detected or the value is updated by non-preload operations. Each of the entries has further associated therewith a retry flag set when the preloaded data is invalid and reloading is required at the point of usage.

REFERENCES:
"Dynamic Memory Disambiguation Using The Memory Conflict Buffer", David M. Gallagher et al., Aspolos VI Proceedings on Architectual Support For Programming Languages And Operating Systems, Sixth International Conference, San Jose, CA, Oct. 4-7, 1994, pp. 183-193.

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