Method for designing a large scale integrated (LSI) layout

Details Method for designing a large scale integrated (LSI) layout Method for designing a large scale integrated (LSI) layout

1996-04-12

1997-12-02

Trans, Vincent N.

Boots, shoes, and leggings

364490, 364489, 364488, G06F 1750

Patent

active

056943288

ABSTRACT:
A plurality of cells which have input terminals and output terminals on four sides are divided into a plurality of groups of cells. The plurality of cells are placed in an array form at positions which are either adjacent or nonadjacent. A plurality of groups of cells are placed one after another such that the resulting layout becomes substantially rectangular or square. Power buses are routed parallel to each other, and power supply lines are routed from the power buses to cells. Data lines are routed between the terminals of the cells.

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