Flip-flop circuit having CMOS hysteresis inverter

Details Flip-flop circuit having CMOS hysteresis inverter Flip-flop circuit having CMOS hysteresis inverter

1991-12-02

1993-05-18

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307290, 3072722, 307481, H03K 3289, H03K 326

Patent

active

052124118

ABSTRACT:
A flip-flop circuit includes a hysteresis inverter, a data input terminal, a data output terminal, a clock input terminal and a transfer gate. The hysteresis inverter has a first inverter whose input and output nodes are connected respectively to the data input and output terminals, and a second inverter whose input and output node are connected respectively to the data output and input terminals. The transfer gate is connected between the data input and output terminals, and turns on and off in response to a clock signal applied to the clock input terminal, thereby changing hysteresis area or effects of the hysteresis inverter. The transfer gate causes the area of hysteresis to be variable, so that the circuit requires only a small number of gate stages, can operate at a high speed, and can operate at a low power supply voltage.

REFERENCES:
patent: 3983545 (1970-09-01), Cordaro
patent: 4003035 (1977-01-01), Hoffmann et al.
patent: 4837465 (1989-06-01), Rubinstein
Cong, Hong-Ih et al., "Multigigahertz CMOS Dual Modulus Prescalar IC", IEEE Journal of Solid State Circuits, vol. 23, No. 5, Oct. 1988, pp. 1189-1193.

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