Pattern memory circuit for integrated circuit testing apparatus

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

371 211, 371 212, 371 213, 371 3, G05B 1902, G11C 700, G11C 800

Patent

active

053273630

ABSTRACT:
A pattern memory circuit for an integrated circuit testing apparatus. The time consumed for diagnosis in the conventional testing apparatus which uses a CPU is reduced by performing test pattern memory checking using hardware in accordance with the present invention. The test pattern file in a pattern memory escapes from the area to be tested to another area of the pattern memory and the test is performed and upon completion of the test the file returns to the original area.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Pattern memory circuit for integrated circuit testing apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Pattern memory circuit for integrated circuit testing apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pattern memory circuit for integrated circuit testing apparatus will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-801413

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.