Miniaturized integrated circuit package

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

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Details

257676, H01L 2348, H01L 2944, H01L 2952, H01L 2960

Patent

active

053270096

ABSTRACT:
A high density integrated circuit package is provided whose miniaturization is performed by positioning inner end portions of lead fingers extending externally of the package inside a peripheral portion of a rectangular semiconductor chip. Bonding terminals on the rectangular semiconductor chip are arranged along one of long sides thereof, a plurality of lead fingers are arranged in a direction perpendicular to the long side and the inner end portions of the lead fingers are arranged in the vicinity of the arrangement of the chip terminals, so that distance between the chip terminals and the inner end portions of the lead fingers is shortened and length of thin metal wires connecting the chip terminals and the inner end portions of the lead fingers is reduced.

REFERENCES:
patent: 4825280 (1989-04-01), Chen et al.
patent: 4862245 (1989-08-01), Pashby et al.
patent: 5072280 (1991-12-01), Matsukura
patent: 5233221 (1993-08-01), Bregman et al.
W. Ward, "Volume Production of Unique . . . IBM 80-ns 1-Mbit DRAM Chip by Area Wire Bond Techniques", Proceedings of the 38th Electronic Component Conference, XIII-4, May, 1988, pp. 552-557.

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