System for bypassing setup states in a bus operation

Details System for bypassing setup states in a bus operation System for bypassing setup states in a bus operation

1994-12-09

1996-12-03

Kim, Ken S.

395823, 395825, G06F 1312

Patent

active

055817939

ABSTRACT:
An apparatus and method increases the speed of processing in an electronic data processing system in which a signal set on a first, higher speed bus is communicated to a second, lower speed bus to execute a data transfer operation between the first, higher speed bus and the second, lower speed bus. The apparatus has means for storing the signal set communicated to the second bus in a first operation and means for detecting whether the next signal set communicated to the second bus for a second operation is the same as in the first operation. A state machine is operatively connected to the first and second buses for receiving dock signals from the first bus. The state machine is responsive to the clock signals to transition from an idle state to at least one set-up state in which a data transfer setup operation occurs and to a further state in which a data transfer is executed. Acceleration means is connected to the state machine and the means for detecting whether the signal sets for the first and second operations are the same. The acceleration means permits bypassing at least one set-up state in the state machine when the next signal set communicated to the second bus for the second operation is the same as in the first operation.

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