Semiconductor device having an interlayer insulating film of hig

Details Semiconductor device having an interlayer insulating film of hig Semiconductor device having an interlayer insulating film of hig

1991-10-25

1994-06-07

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257758, H01L 21316

Patent

active

053192478

ABSTRACT:
A method of manufacturing a semiconductor device having a flat surface and an interlayer insulating film having superior crack resistance is disclosed. A first silicon oxide film having a superior crack resistance is formed on a semiconductor substrate so as to cover the surface of a stepped pattern. A second silicon oxide film having a superior step coverage is deposited on the above-mentioned first silicon oxide film so as to fill the recessed portions of said stepped pattern and to cover said stepped pattern. The above-described second silicon oxide film is etched to a prescribed thickness. A third silicon oxide film superior in filling of recesses is placed into the recessed portions existing on the surface of the above-described second silicon oxide film after its etching. A fourth silicon oxide film is formed on said semiconductor substrate including the above-described second silicon oxide film and third silicon oxide film.

REFERENCES:
patent: 4654269 (1987-03-01), Lehrer
patent: 4962063 (1990-10-01), Maydan et al.
patent: 4972251 (1990-11-01), Lehrer
patent: 4983546 (1991-01-01), Hyun et al.
patent: 5057897 (1991-10-01), Nariani et al.
patent: 5079188 (1992-01-01), Kawai
patent: 5089863 (1992-02-01), Satoh et al.
"Plasma TEOS process for Interlayer Dielectric Applications", by B. L. Chin et al., Solid State Technology, Apr. 1988, pp. 119-122.
"Low-Temperature APCVD Oxide Using TEOS-Ozone Chemistry for Multilevel Interconnections", by H. Kotani et al., International Electron Devices Meeting, 1989, pp. 669-672.
"Comparison of Phosphosilicate Glass Films Deposited by Three Different Chemical Vapor Deposition Methods", by Toshimi Shioya et al., J. Electrochem. Soc.: Solid-State Science and Technology, Sep. 1986, vol. 133, No. 9, pp. 1943-1950.
"Stress in silicon dioxide films deposited using chemical vapor deposition techniques and the effect of annealing on these stresses", by Bharat Bhushan et al., J. Vac. Sci. Technol. B 8 (5), Sep./Oct. 1990 pp. 1068-1074.
"Process Reliablility Considerations of Planarization with Spin-on-Glass", by Yosi Shacham-Diamond, J. Electrochem. Soc., vol. 137, No. 1, Jan. 1990, pp. 190-196.
"Water-Related Degradation of Contacts in the Multilevel MOS IC with Spin-on Glasses as Interlevel Dielectrics", by N. Lifshitz et al., IEEE Electron Device Letters, vol. 10, No. 12, Dec. 1989, pp. 562-564.
"Application of Surface Reformed Thick Spin-on-Glass to MOS Device Planarization", by Shinichi Ito et al., J. Electrochem. Soc., vol. 137, No. 4, Apr. 1990, pp. 1212-1218.
"Dielectric Film Deposition by Atmospheric Pressure and Low Temperature CVD Using TEOS, Ozone and New Organometallic Doping Sources", Nishimoto, et al., Jun. 1989 VMIC Conference, IEEE, pp. 382-389.
"A Single-pass, In-siut Planarization Process Utilizing TEOS for Double-poly, Double-metal CMOS Technologies", Mehta et al., Jun. 1989 VMIC Conference, IEEE, pp. 80-88.
"Low-temperature APCVD Oxide Using TEOS-ozone Chemistry for Multilevel Interconnections", Kotani et al., LSI Research and Development Laboratory, Mitsubishi Electric Corporation, pp. 28.2.1-28.2.4.
Kenzo Matsuda and Keizo Sakiyama, "Planar Technique for Sub-Micron Device Planar Technique by Complex Process," Semicom News (Special Issue), Jun. 1989, pp. 62-67.

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