Fishing – trapping – and vermin destroying
Patent
1992-04-16
1994-03-29
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437228, 437200, H01L 21465
Patent
active
052984630
ABSTRACT:
A method of processing a semiconductor wafer includes: a) fabricating a wafer to define a plurality of conductive regions, the conductive regions having outer surfaces positioned at varying elevations on the wafer thereby defining at least one high elevation conductive region and at least one low elevation conductive region; b) providing a planarized insulating dielectric layer atop the wafer; c) patterning the insulating dielectric layer for defining a plurality of contact openings through the insulating dielectric to selected conductive regions at the varying elevations; d) first etching the plurality of contact openings into the patterned insulating layer downwardly to stop at the high elevation conductive region outer surface to which electrical contact is to be made; e) after first etching, selectively depositing a layer of an etch stop material to a selected thickness atop the outer surface of the high elevation conductive region; and f) second etching the plurality of contact openings into the patterned insulating material to the low elevation conductive region outer surface to which electrical contact is to be made using the selectively deposited etch stop material layer over the high elevation conductive region as an etch stop protecting layer during such second etching. Photoresist may or may not remain in place during the second etching depending on insulating dielectric layer thicknesses.
REFERENCES:
patent: 5118382 (1992-06-01), Cronin et al.
patent: 5157002 (1992-10-01), Moon
patent: 5206187 (1993-04-01), Doan
patent: 5219793 (1993-06-01), Cooper et al.
patent: 5223084 (1993-06-01), Uesato et al.
Wolf et al., "Silicon Processing for the VLSI Era, vol. 1-Process Technology" pp. 402, 403, Lattice Press, Sunset Beach, Calif. (1986).
Tsunenari et al., "Electrical Characteristics Of Selective Tungsten Plugged Contacts Under The Optimized Conditions", present at the VLSI Conf. (1991).
Cathey David A.
Sandhu Gurtej S.
Booth Richard A.
Chaudhuri Olik
Micro)n Technology, Inc.
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