Recessed and sidewall-sealed poly-buffered LOCOS isolation metho

Details Recessed and sidewall-sealed poly-buffered LOCOS isolation metho Recessed and sidewall-sealed poly-buffered LOCOS isolation metho

1991-04-30

1994-03-29

Fourson, George

Fishing, trapping, and vermin destroying

437 72, H01L 2176

Patent

active

052984516

ABSTRACT:
This is a method for forming a recessed LOCOS isolation region, which includes the steps of forming a first silicon nitride layer between the pad oxide layer and a polysilicon buffer layer and a second nitride layer over the polysilicon buffer layer. In addition, the method for forming LOCOS isolation regions can include the additional steps of forming a sidewall seal around the perimeter of the active moat regions prior to the field oxidation step. The resulting field oxide isolation regions have provided a low-profile recessed field oxide with reduced oxide encroachment into the active moat region.

REFERENCES:
Wolf, S., et al, Silicon Processing for the VLSI Era; vol. 2: Process Integration, 1990, pp. 43-44.
Ghandhi, S., VLSI Fabrication Principles, 1983, p. 360.

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