TTL to CMOS translating circuits without static current

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307446, 307451, 307443, 307263, 307542, 307544, H03K 19092, H03K 19094, H03K 19003, H03K 19017

Patent

active

050878417

ABSTRACT:
TTL to CMOS level translating buffer circuits incorporate multiple stages with feedback and forward couplings between stages that eliminate static current I.sub.cct when TTL high potential level data signal is applied at the buffer circuit input. The feedback and feed forward couplings maintain and enhance signal propagation speed in the buffer circuits at the same time. TTL to CMOS translating latch circuits and flip-flop circuits similarly incorporate feedback and feed forward circuit couplings to save and retain data signals during latch mode, static mode, and tristate mode operation while at the same time substantially eliminating static high current I.sub.cct. The clock circuit portions for the latch and flip-flop circuits also are arranged in clock circuit configurations that are free of static current I.sub.cct.

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patent: 4988897 (1991-01-01), Jeong

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