Fishing – trapping – and vermin destroying
Patent
1989-07-27
1992-02-11
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 44, 437 49, 437 52, 437195, H01L 21265
Patent
active
050875833
ABSTRACT:
An EEPROM memory cell structure and architecture that achieve very high speed programming with low power. The cell has four control terminals. The structure utilizes programming and erasure by electron tunneling only. The structure allows programming by hot electrons from the substrate and erasure by electron tunneling between polycrystalline silicon layers. A process for forming the structure results in final feature size for the floating gate and the space between floating gates in a memory array to be significantly smaller than achievable by photolithography equipment's resolution capability.
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R. Kazerounian et al., A 5 Volt High Density Poly-Poly Erase Flash EPROM Cell, IEDM-88 (Dec. 11).
J. Miyamoto et al., A 1.0 .mu.m CMOS/Bipolar Technology for VLSI Circuits, IEDM-83.
T. Mizuno et al., Si.sub.3 N.sub.4 /SiO.sub.2 Spacer Induced High Reliability in LODMOSFET and Its Simple Degradation Model, IEDM-88.
K. Yoshikawa et al., An Asymmetrical Lightly-Doped Source (ALDS), Cell for Virtual, Ground High Density EPROMs, IEDM-88, 1988.
Chaudhari C.
Hearn Brian E.
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