Programmable windowing FFT device with reduced memory requiremen

Details Programmable windowing FFT device with reduced memory requiremen Programmable windowing FFT device with reduced memory requiremen

1989-10-03

1990-11-13

Malzahn, David H.

Boots, shoes, and leggings

G06F 15332

Patent

active

049706748

ABSTRACT:
An FFT building block useful in building FFT arrays includes a discrete-Fourier-transform device (DFT) having a plurality of DFT input lines, and a plurality of multipliers. Each multiplier has a multiplier-input line and a multiplier-output line. The multiplier-output line of each multiplier is connected to a corresponding DFT input line. Each multiplier implements distributed arithmetic to produce at the multiplier output a value corresponding to a combination of a value on the multiplier-input line and a predetermined multiplier coefficient.

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patent: 4680727 (1987-07-01), White
patent: 4689762 (1987-08-01), Thibodeau
Hemel, "Making small ROM's do math quickly, cheaply & easily" Electronics May 11, 1970, pp. 104-111.
Kaiser et al "Digital Filters for High Speed Data Processing" Advanced Technology Labs. Defense Electronic Products RCA Camden, New Jersey, Tech. Report AFAL-TR-70-204, Sep. 1970, pp. 7-1 thru 7-19.

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