Silicon barrier Josephson junction configuration

Details Silicon barrier Josephson junction configuration Silicon barrier Josephson junction configuration

1980-10-29

1983-01-11

Edlow, Martin H.

357 55, H01L 3922, H01L 2906

Patent

active

043684793

ABSTRACT:
A planar, silicon barrier, Josephson junction and method of forming the junction which does not require expensive high-resolution, lithography techniques such as electron beam or x-ray. The method includes an etching mask-etch process which forms the basic structure configuration using a (110)-cut silicon wafer. Subsequent to the etching process the mask is removed and a superconducting film is deposited on the previously formed silicon surface to produce a single crystal silicon barrier with good electrical properties.

REFERENCES:
patent: 4065742 (1977-12-01), Kendall et al.
patent: 4253230 (1981-03-01), Davis
A. T. Stoller, "The Etching of Deep Vertical-Walled Patterns in Silicon", A Review, Jun., 1970, pp. 271-275.
A. Bohg, "Ethylene Diamine-Pyrocatechol-Water Mixture Shows Etching Anomaly in Boron-Doped Silicon", Journal of the Electrochemical Society, vol. 118, (1971) pp. 401-402.
C. L. Huang and T. Van Diezer, "Josephson Tunneling Through Locally Thinned Silicon Wafers", Applied Physics Letters, vol. 25, No. 12, (1974) pp. 753-756.

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