Presettable multi-stage binary-coded decimal counters

Details Presettable multi-stage binary-coded decimal counters Presettable multi-stage binary-coded decimal counters

1975-02-26

1976-08-24

Shaw, Gareth D.

Registers

Platform operated

Platform actuated traffic counters

235 92CC, 235 92R, H03K 2136

Patent

active

039768597

ABSTRACT:
A multiple-stage binary-coded decimal counter comprises a number of stages each having four preset data input points capable of being energized in parallel binary fashion. A presetting counter is provided, arranged to supply to the preset data input points binary signals representing a decimal digit. The presetting counter is itself actuated by an abrupt signal, and means are provided for selecting the counter stages one at a time for setting from the presetting counter. This last-mentioned means is inhibited except during the presetting procedure.

REFERENCES:
patent: 3272970 (1966-09-01), Laycak et al.
patent: 3413452 (1968-11-01), Schlein
patent: 3705296 (1972-12-01), Kochi
patent: 3813525 (1974-05-01), Kitterman et al.
patent: 3863224 (1975-01-01), Alexander

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