Semiconductor memory device having stacked capacitor cells

Details Semiconductor memory device having stacked capacitor cells Semiconductor memory device having stacked capacitor cells

1988-12-21

1990-11-13

Munson, Gene M.

357 41, 357 59, H01L 2978, H01L 2702, H01L 2904

Patent

active

049705644

ABSTRACT:
A semiconductor memory device having STC cells wherein major portions of active regions consisting of channel-forming portions are tilted at an angle of 45.degree. with respect to the word lines and the bit lines that meet at right angles with each other, enabling the storage capacity portions to be arranged very densely and sufficiently large capacities to be maintained with very small cell areas. In the semiconductor memory device, furthermore, the storage capacity portions are formed even on the bit lines. Therefore, the bit lines are shielded, the capacitance between the bit lines decreases, and the memory array noise decreases.

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