High resolution masking process for minimizing scattering and la

Details High resolution masking process for minimizing scattering and la High resolution masking process for minimizing scattering and la

1981-01-21

1983-01-11

Pianalto, Bernard D.

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

427 431, B05D 306

Patent

active

043682154

ABSTRACT:
The specification describes a process for masking a collimated ion beam for either forming resist patterns on selected substrates or for other selective ion implantation purposes. This process includes the steps of forming an ion absorption mask on the surface of a hyper thin supporting membrane and thereafter aligning the mask with a substrate having a layer of resist thereon. Next, the ion absorption mask is exposed to a beam of ions which pass through certain areas of the absorption mask and into the resist layer to thereby expose selected regions in the resist layer (i.e., to increase or decrease the solubility of the resist to a chosen developer). In a specific embodiment of the invention, the ion absorption mask is formed by initially anodizing an aluminum substrate to form a thin coating of aluminum oxide thereon, and thereafter depositing a gold mask on one surface of the aluminum oxide coating. Certain regions of the aluminum substrate beneath the gold mask are removed to expose the aluminum oxide immediately beneath the gold mask, thereby forming a thin taut aluminum oxide membrane which supports the gold ion absorption mask.

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