Digital logic circuit for incremental encoders

Details Digital logic circuit for incremental encoders Digital logic circuit for incremental encoders

1989-06-05

1990-10-23

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Applications

Position determining

377 45, 377 55, 377111, 307512, 307515, 328166, H03D 1300, H03K 2102, G06M 302

Patent

active

049658166

ABSTRACT:
A digital logic circuit for use with an incremental positioning encoder is presented. The circuit converts two quadrature pulse train signals, generated by an incremental position type encoder, to a counting CLOCK signal and an UP/DOWN count signal. The signals are transmitted on counters to generate counting clock signal and the UP/DOWN count position information. The circuit utilizes gate delays to detect the edge of a pulse train signal. No external clocks or comparators are nested. The design, by relying on the propagation delay of gates, keeps the circuit simple and more reliable.

REFERENCES:
patent: 3665323 (1972-05-01), Peterson
patent: 3917926 (1975-11-01), Gerard et al.
patent: 3982107 (1976-09-01), Butler
patent: 4016432 (1977-04-01), Marzalek
patent: 4060242 (1977-11-01), Huang
patent: 4446389 (1984-05-01), Williams et al.
patent: 4634860 (1987-01-01), Aiello et al.
patent: 4664523 (1987-05-01), Dorsman

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