Patent
1990-02-28
1990-10-23
Carroll, J.
357 68, 357 71, 357 72, 357 74, 357 80, H01L 2906, H01L 2348, H01L 2302, H01L 3902
Patent
active
049656538
ABSTRACT:
The present invention discloses a suitable mounting of a wafer scale LSI (wafer scale integration) (WSI) in which a slit formed in a wafer is fit to a connector, a U-shaped reinforcing rubber member is disposed at the circumferential edge of the wafer, or a flexible adhesive is used for bonding a substrate formed with through-holes and a wafer, to provide a WSI mounting structure of high integration degree and high reliability. Furthermore, a method of efficient mounting by conducting the wiring of the wafer and the connection with the external terminal of the chip in one identical production step is disclosed.
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patent: 4484215 (1984-11-01), Pappos
patent: 4697203 (1987-09-01), Sakai et al.
patent: 4715115 (1987-12-01), King et al.
patent: 4736012 (1988-04-01), Shoji et al.
patent: 4745455 (1988-05-01), Glascock, II et al.
Kuroda Shigeo
Nakamura Hisashi
Otsuka Kanji
Sato Katsuyuki
Shouji Shinichi
Carroll J.
Hitachi , Ltd.
Hitachi VLSI Engineering Corp.
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