Boots – shoes – and leggings
Patent
1993-01-04
1995-07-04
Harvey, Jack B.
Boots, shoes, and leggings
364DIG1, G06F 1210
Patent
active
054308577
ABSTRACT:
A method of addressing units of data stored in a memory using logical addresses. The logical addresses include fewer bits than necessary to uniquely address each unit of data stored in the memory. Translation of a logical address begins with analysis of a first logical address associated with a first unit of data to determine whether it is an even logical address or an odd logical address. A number of similar steps are taken in either case. If the first logical address is an even logical address these steps include coupling the first number of bits to an even translation table. The even translation table stores an even pointer for each even logical address. Each even pointer includes fewer bits than necessary to uniquely identify each unit of data stored in the memory. The even translation table couples the pointer to a first memory, which stores units of data associated with even logical addresses. Finally, in response to the even pointer a first unit of data is output from the even memory. On the other hand, if the first logical address is an odd logical address then the first logical address is coupled to an odd translation table. The odd translation table stores an odd pointer for each odd logical address. Like the even pointers, each odd pointer includes fewer bits than necessary to uniquely identify each unit of data stored in the memory array. In response to the first logical address, the odd translation table couples a second odd pointer to an odd memory, which stores units of data associated with odd logical addresses. The odd memory then outputs the first unit of data associated with the first logical address.
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Harvey Jack B.
Intel Corporation
Whitfield Michael A.
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