Semiconductor memory devices with amorphous silicon alloy

Details Semiconductor memory devices with amorphous silicon alloy Semiconductor memory devices with amorphous silicon alloy

1995-12-19

1999-10-26

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Non-single crystal, or recrystallized, semiconductor...

257 52, 257 53, 257 54, 257 63, 257 70, 257 72, 257196, 365129, H01L 3904, H01L 31036

Patent

active

059733357

ABSTRACT:
A semiconductor memory device includes first and second conductive contact layers (12, 15) and an hydrogenated, silicon-rich, amorphous silicon alloy layer (14), particularly an amorphous silicon nitride or amorphous silicon carbide alloy, extending between the contact layers. A defect band is induced in the amorphous silicon layer which lowers the activation energy level for the transport of carriers through the structure by an amount that is selectable and determined by the defect band. The defect band is created by a programming process, for example, using current stressing or particle bombardment. A memory matrix array device is provided by forming a row and column array of such memory devices from common deposited layers on a common substrate with crossing sets of row and column conductors separated by a layer of the alloy material defining a memory device at each of their cross-over regions. A plurality of overlying arrays of memory devices may be stacked on the support to provide a 3-D memory structure in a simple manner.

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"Metal-Semiconductor Transition in Electroformed Chromium/Amorphous Silicon/Vanadium Thin-Film Structures", by J. Hajto et al, Philosophical Magazine B., 1994, vol. 69, No. 2, 237-251.

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