Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1995-11-20
1997-06-10
Tsai, Jey
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
H01L 2170, H01L 2700
Patent
active
056375239
ABSTRACT:
A method of forming a capacitor includes, a) providing a series of alternating first and second layers of semiconductive material over a node location, a first of the first and second layers having an average conductivity enhancing dopant concentration of greater than about 5.times.10.sup.19 ions/cm.sup.3, a second of the first and second layers having an average conductivity enhancing dopant concentration from 0 ions/cm.sup.3 to about 5.times.10.sup.19 ions/cm.sup.3, at least one of the first and second layers being selectively etchable relative to the other of the first and second layers; b) providing a contact opening through the first and second layers of semiconductive material to the node location; c) providing an electrically conductive within the contact opening; d) masking and etching the conductive layer and the series of alternating layers to form a first capacitor plate; e) etching the one of the first and second layers at a faster rate than the other of the first and second layers to define lateral projections of the other of the first and second layers relative to the one of the first and second layers, the electrically conductive layer being in ohmic electrical connection with the first and second layers and lateral projections thereof; the conductive layer, the first and second layers and lateral projections thereof comprising the first capacitor plate; f) providing a capacitor dielectric layer over the conductive layer and the lateral projections; and g) providing a second capacitor plate over the capacitor dielectric layer.
REFERENCES:
patent: 5071781 (1991-12-01), Seo et al.
patent: 5223729 (1993-06-01), Kudoh et al.
patent: 5290726 (1994-03-01), Kim
Morihara, Toshinori et al., "Disk-Shaped Stacked Capacitor Cell for 256 Mb Dynamic Random-Access Memory", Jpn. J. Appl. Phys., vol. 33 (1994) Pt. 1, No.8.
Watanabe, Hidehiro, et al., "Stacked Capacitor Cells for High-Density RAMs", IEDM '88, pp. 600-603.
S.H. Woo, et al., "Selective Etching Technology of in-situ P Doped Poly-Si (SEDOP) for High Density DRAM Capacitor", IEEE, 1994, pp. 25-26.
Fazan Pierre C.
Keeth Brent
Micro)n Technology, Inc.
Tsai Jey
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