Pipelined microinstruction apparatus and methods with branch pre

Details Pipelined microinstruction apparatus and methods with branch pre Pipelined microinstruction apparatus and methods with branch pre

1995-12-26

1997-09-09

Treat, William M.

395569, G06F 938

Patent

active

056665075

ABSTRACT:
High speed instruction execution apparatus is disclosed which provides multistage pipelining and branch prediction in a manner which permits speculative changes of state to be made during execution of a predicted instruction before the correctness of the prediction has been determined.

REFERENCES:
patent: 4901233 (1990-02-01), Liptay
patent: 4992934 (1991-02-01), Portanova et al.
patent: 5136696 (1992-08-01), Beckwith et al.
patent: 5222244 (1993-06-01), Carbine et al.
patent: 5241636 (1993-08-01), Kohn
patent: 5293613 (1994-03-01), Hayden et al.
patent: 5367705 (1994-11-01), Sites et al.
Smith et al., "Implementing Precise Interrupts in Pipelined Processors", IEEE Transactions on Computers, vol. 37, No. 5, May 1988, pp. 562-573.
MC88100 RISC Microprocessor User's Manual, Section 1, 1988.
MC88110 Second Generation DISC User's Manual, Sections 9,3,4,3-9,3,4,5,4.

Affiliated with

Also associated with

Rating

Pipelined microinstruction apparatus and methods with branch pre does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Pipelined microinstruction apparatus and methods with branch pre, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pipelined microinstruction apparatus and methods with branch pre will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-76364