Programmable random access memory (PRAM) integrated circuit memo

Details Programmable random access memory (PRAM) integrated circuit memo Programmable random access memory (PRAM) integrated circuit memo

1975-01-17

1977-01-18

Hecker, Stuart N.

Communications: electrical

Digital comparator systems

340173CA, G11C 1140

Patent

active

040042863

ABSTRACT:
A novel integrated circuit memory cell structure where the individual cells in the storage matrix may be utilized as either a RAM type storage cell or a ROM type storage cell; this selective type storage cell is referred to as a programmable random access (PRAM). Each individual cell of the matrix comprises a write transistor, a read transistor, a RAM storage transistor, and a ROM floating gate storage transistor. Several different circuit arrangements for these four different transistors are shown in different embodiments of the invention.

REFERENCES:
patent: 3718915 (1973-02-01), Lattin
patent: 3744036 (1973-07-01), Bentchkowsky
patent: 3855581 (1974-12-01), Greene
Regitz et al., Three-Transistor-Cell 1024-Bit 500-ns MOS RAM, IEEE Journal of Solid-State Circuits, vol. SC-5, No. 5, Oct. 1970, pp. 181-186.
Davidson et al., Nonvolatile Read-Mostly Memory Cell, IBM Technical Disclosure Bulletin, vol. 15, No. 7, Dec. 1972, pp. 2282-2283.

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