Method of making flash EEPROM memory

Details Method of making flash EEPROM memory Method of making flash EEPROM memory

1994-11-28

1995-07-04

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 43, 437984, H01L 21266, H01L 218247

Patent

active

054299608

ABSTRACT:
This invention provides a flash EEPROM, or electrically programmable and erasable read only memory, structure and a method for forming the flash EEPROM structure. The invention uses a large angle ion implant beam without wafer rotation to form the source and drain regions of the memory cell. A low doped region is formed at the edge of the drain region. The tunnel dielectric is formed directly above the low doped region. The width of the low doped region is controlled by the angle of the large angle ion implant beam and can be very accurately controlled. The tunnel dielectric is formed independently of the gate dielectric and the thickness of each can be optimized. The tunnel dielectric area can be made very small which improves reliability and reduces the voltage necessary to program and erase the memory cell. A temporary nitride floating gate electrode, which is later replaced by a polysilicon floating gate electrode, provides flexibility in the location of the floating gate electrode.

REFERENCES:
patent: 5310693 (1994-05-01), Hsue
patent: 5352618 (1994-10-01), Larsen et al.

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