Self-aligned contact process

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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Details

257767, 257758, 257774, H01L 2978, H01L 2944

Patent

active

053693035

ABSTRACT:
A method for forming a self-aligned contact utilizes a thin insulating layer formed on the upper surface of a conductive layer. A barrier layer is deposited over the insulating layer, and gate electrodes are then defined. Sidewall spacers are formed along the vertical sidewalls of the gate electrodes. During formation of the sidewall spacers the barrier layer protects the gate electrodes. A second insulating layer is then deposited and a via is opened to the substrate. A contact can now be created by depositing conductive material into the via.

REFERENCES:
patent: 4743564 (1988-05-01), Sato et al.
patent: 4855798 (1989-08-01), Imamura et al.
patent: 4922311 (1990-05-01), Lee et al.
patent: 5043790 (1991-08-01), Butler
patent: 5075762 (1991-12-01), Kondo et al.
IBM Technical Disclosure Bulletin, vol. 32, No. 4A, Sep. 1989, New York, United States pp. 344-345.
IBM Technical Disclosure Bulletin, vol. 33, No. 6A, Nov. 1990, New York, United States p. 470, paragraph 1; and p. 471, paragraph 2.

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