Three-terminal negative admittance network

Oscillators – Solid state active element oscillator – Transistors

Patent

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Details

331108R, 331117R, H03B 508

Patent

active

046600019

ABSTRACT:
Three-terminal negative admittance networks are disclosed. The preferred networks include either a bipolar junction transistor or a field-effect transistor phase shift mechanisms are used to generate a negative admittance. Various biasing schemes for proper operations of the network are also explained.

REFERENCES:
patent: 3639858 (1972-02-01), Miyata et al.
patent: 4507622 (1985-03-01), Muth

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