Self testing computer system with circuits including test regist

Details Self testing computer system with circuits including test regist Self testing computer system with circuits including test regist

1993-11-15

1995-07-25

Ramirez, Ellis B.

Boots, shoes, and leggings

364579, 371 24, 371 251, 371 225, 371 226, G06F 1127

Patent

active

054368561

ABSTRACT:
The present invention relates to a testing method for an intermediate circuit between a microprocessor and surrounding circuits comprising a first set of access routes including lines of a data bus (D) and a control bus (C), and a second set of access paths comprising lines (AH) connected to other lines (CS) through a processing circuit (40). This method consists in providing in the intermediate circuit a test register (46) addressable by addresses ignored by the other elements of the circuit; writing test words in the test register through either one of the first and second set of as paths; reading the written words in the test register through the other set of access paths; and checking whether the read words correspond in a predetermined way to the test words.

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IBM Technical Disclosure Bulletin, vol. 30, No. 9, Feb. 1988, New York, U.S., pp. 187-188, "Shadow Diagnostic Register for Gate Array Circuit Testing".
Tietze et al. Halbleiter-Schaltungstechnik 1985, Springer-Verlas, Berlin, p. 647, line 18-p. 649, line 2.

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