Neural network integrated circuit device having self-organizing

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364807, 307201, G06F 700

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active

051485141

ABSTRACT:
An extension directed integrated circuit device having a learning function on a Boltzmann model, includes a plurality of synapse representing units arrayed in a matrix to form a rectangle including a first and second triangles on a semiconductor chip, a plurality of neuron representing units and a plurality of educator signal control circuits which are arranged along first and second sides of the rectangle, and a plurality of buffer circuits arranged along third and fourth sides of the rectangle. The first side is opposite to the third side, and the second side is opposite to the fourth side. Axon signal transfer lines and dendrite signal lines are so arranged that the neuron representing units are full-connected in each of the first right triangle the second right triangle. Alternatively, axon signal lines and dendrite signal ines are arranged in parallel with rows and columns of the synapse representing unit matrix, so that the neuron representing units are full-connected in the rectangle. Each synapse representing unit is connected to a pair of axon signal transfer lines and a pair of dendrite signal transfer lines.

REFERENCES:
patent: 4906865 (1990-03-01), Holler
patent: 4926180 (1990-05-01), Anastassiou
patent: 4988891 (1991-01-01), Mashiko
patent: 5021988 (1991-06-01), Mashiko
"Electronic Implementation of Neuromorphic System", CICC, 1988, p. 10.1.3.
"Parallel Distributed Processing", Chapter 7 (The Boltzmann Machine Learning Algorithm).
Alspector, J. and Allen, R. B., "A Neuromorphic VLSI Learning System", Advanced Research in VLSI, MIT Press, 1987, pp. 313-327.

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