Fishing – trapping – and vermin destroying
Patent
1991-11-04
1992-09-15
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 32, 148DIG9, H01L 21331
Patent
active
051478188
ABSTRACT:
A method for manufacturing a semiconductor device wherein in the case where a Bi transistor and a CMOS transistor are to be formed on a first conductive semiconductor substrate, a gate oxide film on an active base in a Bi transistor formation region is partially removed by a predetermined pattern so as to form the opening of the gate oxide film, a polysilicon layer having second conductive impurities doped at a high density is patterned over the edge of the opening, and the emitter region of the Bi transistor is formed from the portion in which the active base comes into contact with the first conductive semiconductor substrate, i.e., from the gate edge and the edge of the opening of the gate oxide film to the portion in which the gate oxide film comes into contact with a gate, prior to the steps of determining a transistor formation region by an isolation oxide film, thermally oxidizing the whole surface of the semiconductor substrate including the isolation oxide film, injecting first conductive impurities as the active base in the Bi transistor formation region and forming the polysilicon layer having the second conductive impurities doped at the high density at the gate of the CMOS transistor.
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patent: 5045493 (1991-09-01), Kameyama et al.
CMOS Compatible Lateral Bipolar Transistor for BiCMOS Technology, Akiyama et al, pp; 109-112, 1989.
Chaudhari C.
Hearn Brian E.
Sharp Kabushiki Kaisha
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