Method for fabricating a multichip semiconductor device having t

Details Method for fabricating a multichip semiconductor device having t Method for fabricating a multichip semiconductor device having t

1991-03-01

1992-09-15

Kunemund, Robert

Fishing, trapping, and vermin destroying

437206, 437207, 437208, 437217, 437220, H01L 2156, H01L 2158, H01L 2160

Patent

active

051478153

ABSTRACT:
A packaged semiconductor device is disclosed having at least two electronic components encapsulated in a single body of standard size and pin-out configuration. In accordance with one embodiment of this invention, two leadframes, having electronic components electrically coupled thereto, are positioned such that the electronic components are in a stacked relationship and the outer portions of the two sets of leads within each leadframe are interdigitated. The configuration enables all components to be accessed independently and minimizes the footprint of the device while maintaining a standard package outline.

REFERENCES:
patent: 3808673 (1974-05-01), Bottini
patent: 4437235 (1984-03-01), McIver
patent: 4496965 (1985-01-01), Orcutt et al.
patent: 4677526 (1987-06-01), Muehling
patent: 4755474 (1988-07-01), Moyer
patent: 4763188 (1988-08-01), Johnson
patent: 4796078 (1989-01-01), Phelps, Jr. et al.
patent: 4801765 (1989-01-01), Moyer et al.

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