Method of manufacturing semiconductor device by controlling the

Fishing – trapping – and vermin destroying

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437 43, 437 45, 437150, H01L 2122, H01L 21266

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051478110

ABSTRACT:
The invention provides a novel method of manufacturing a semiconductor device comprising those sequential steps including the following, formation of a floating gate electrode on a region predetermined for the formation of the first conductive channel across an insulation film, followed by superimposition of a control gate electrode on the floating gate electrode across another insulation film. After completing the formation of the stacked gate electrode unit, the first conductive impurities are injected into silicon substrate by applying a minimum of 8 degrees of angle against the normal of this substrate under aid of ionic injection, and then forms a region containing strong density of the first conductive impurities adjacent to the boundary of a layer of diffused second conductive impurities which is at least predetermined to become the drain region of the transistor incorporating the stacked gate electrode unit. As a result of the provision of the region containing strong density of impurities injected in the oblique direction, the efficiency in the writing of data into the floating gate electrode is significantly promoted, and at the same time occurrence of "short-channel" effect can securely be suppressed as well.

REFERENCES:
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Hori et al., "A New Submicron MOSFET with LATID (Large-Tilt-Angle Implanted Drain) Structure", VLSI Symp. Dig., pp. 15-16, May 1988.
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Patent Abstracts of Japan, vol. 6, No. 230 (E-142)(1108), Nov. 16, 1982 & JP-A-57130475 (Mitsubishi Denki) Sep. 12, 1982.
"A New Half-Micron p-Channel Mosfet with Latips." IEDM Technical Digest 1988, pp. 394-397, Takashi Hori and Kazumi Kurimoto, Dec. 11, 1988.
"Asymmetrical Halo Source GOLD drain (HS-GOLD) Deep Sub-Half Micron n-MOSFET Design For Reliability And Performance." IEDM Technical Digest 1989, pp. 617-620, T. N. Buti, S. Ogura et al., Dec. 3, 1989.

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