Frequency divider using a charged coupled device

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307221D, H03K 2136

Patent

active

040385655

ABSTRACT:
A CCD with N bits is clocked at a frequency f, which may be either constant or variable over a wide range. Meanwhile, a charge introduced into the first bit at t = 0 reaches the nth bit, n clock periods later, namely, at t = n/f. If this charge is sensed to give an output signal and the signal is fed back to introduce a charge again into the first bit, then a periodic output is obtained with pulses spaced every n/f seconds; the output frequency is therefore, 1
times the input clock frequency. Output frequencies f, f/2, f/3, . . . f/N can be obtained by selecting n. The system includes the following structure:

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patent: 3868516 (1975-02-01), Buss

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