Semiconductor integrated circuit device having multi-level wirin

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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Details

257700, 257774, 257637, H01L 2348, H01L 23522, H01L 2940

Patent

active

057104620

ABSTRACT:
First plugs project from a lower inter-level insulating layer so as to be coplanar with an upper surface of a middle-level wiring on the lower-level insulating layer, and through-holes are formed in an upper inter-level insulating layer over the middle-level wiring and the first plug without an over-etching, thereby allowing second plugs in the through-holes to be directly held in contact with the middle-level wiring and the first plug.

REFERENCES:
patent: 5034799 (1991-07-01), Tomita et al.
patent: 5446311 (1995-08-01), Ewen et al.
patent: 5471093 (1995-11-01), Cheung
patent: 5500558 (1996-03-01), Hayashide
patent: 5517060 (1996-05-01), Kobayashi
patent: 5525827 (1996-06-01), Norman
patent: 5548159 (1996-08-01), Jeng
patent: 5554864 (1996-09-01), Koyama

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