Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1997-01-10
1998-01-20
Thomas, Tom
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257760, 257640, 257904, 257752, 257903, 257350, 257380, 257381, 257385, 257758, H01L 2934, H01L 2348, H01L 23522, H01L 2954
Patent
active
057104611
ABSTRACT:
A 4-T SRAM cell in which two layers of permanent SOG (with an intermediate oxide layer) are used to provide planarization between the first and topmost poly layers.
REFERENCES:
patent: 4676867 (1987-06-01), Elkins et al.
patent: 4797717 (1989-01-01), Ishibashi et al.
patent: 4920071 (1990-04-01), Keller et al.
patent: 4975875 (1990-12-01), Ito
patent: 4990998 (1991-02-01), Koike et al.
patent: 5001539 (1991-03-01), Inoue et al.
patent: 5077238 (1991-12-01), Fujii et al.
patent: 5083190 (1992-01-01), Pfiester
patent: 5110763 (1992-05-01), Matsumoto
patent: 5132774 (1992-07-01), Matsuura et al.
patent: 5151376 (1992-09-01), Spinner, III
patent: 5159416 (1992-10-01), Kudoh
patent: 5169491 (1992-12-01), Doam
patent: 5177238 (1993-01-01), Lee et al.
patent: 5188987 (1993-02-01), Ogimo
patent: 5204288 (1993-04-01), Marks et al.
patent: 5219792 (1993-06-01), Kim et al.
patent: 5290399 (1994-03-01), Reinhardt
patent: 5319247 (1994-06-01), Matsuura
patent: 5373170 (1994-12-01), Pfiester et al.
patent: 5381046 (1995-01-01), Cederbaum et al.
patent: 5534731 (1996-07-01), Cheung
patent: 5552628 (1996-09-01), Watanabe et al.
IEEE Electron Device Letters, vol. 12, No. 3, Mar. 1991, Hot-Carrier Aging of the MOS Transistor in the Presence of Spin-On Glass as the interlevel Dielectric, by N. Lifshitz and G. Smolinsky, pp. 140-142.
Journal Electrochem. Soc., vol. 139, No. 2, Feb. 1992, Three "Lot Dt" Options for Planarizing the Pre-Metal Dielectric on an Advanced Double Poly BiCMOS Process, by W. Dauksher, M Miller, and C. Tracy, pp. 532-536.
Journal Electrochem. Soc., vol. 139, No. 2, Feb. 1992, Polysilicon Planarization Using Spin-On Glass, by Shrinath Ramaswami and Andrew Nagy, pp. 591-599.
Journal Electronicem. Soc., vol. 140, No. 4, Apr. 1993, The Effect of Plasma Cure Temperature on Spin-On Glass, by Hideo Namatsu and Kazushige Minegishi, pp. 1121-1125.
Nguyen Loi
Sundaresan Ravishankar
Galanthay Theodore E.
Jorgenson Lisa K.
SGS-Thomson Microelectronics Inc.
Thomas Tom
Williams Alexander Oscar
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